1.2 Gigasample/sec IEEE single precision floating point FFT

400 MHz in XCV4SX55-11

• 32 to 2048 point complex in, complex out
• IEEE single precision floating point in and out
• 30-35 bit mantissa internal
• 3 complete 400MHz FFT processors in parallel
• 2D-FFT in two passes
• Equivalent to 66 GFLOPs
• This design is described in the paper Hybrid Floating Point Technique Yields 1.2 Gigasample Per Second 32 to 2048 point Floating Point FFT in a single FPGA and in the Xilinx DSP magazine article Supercharge Your DSP with Ultra-Fast Floating-Point FFTs